loops - How to convert list of filenames to set of variables names in makefile -

how convert list of filenames set of variables names in makefile?

for example, have list of filenames , set of variables:

    filename := file1 file2 file3 ...     file1 := opt1     file2 := opt2     file3 := opt3     ...     ... 

and want create new set of variable:

    file1_opt := $(file1)     file2_opt := $(file2)     file3_opt := $(file3)     ...     ... 

how in makefile?

for bash simple:

    name in $(filenames)           $($(subst .,_,$(subst /,_,name)))_opt := $($(subst .,_,$(subst /,_,name)))     done 

but how make in makefile?

example:

./module/files.mk

    c_src := a_file.c b_file.c     cpp_src := c_file.cpp d_file.cpp      a_file_c := -o2     b_file_c := -dn_debug 

./makefile

    ....      srcdir := module     include makef.mk     ....     $(c_obj) : $(objdir)/%.o : %.c       $(cc) -c $(c_flags) $(c_flags_$(subst .,_,$(subst /,_,$<))) $< -o $@     .... 

./makef.mk

    save_c_src := $(c_src)     save_cpp_src := $(cpp_src)      c_src :=     cpp_src :=      include $(srcdir)/files.mk     mk_dirs += $(objdir)/$(srcdir)      ----[ problem site ]----     # work bash not make     name in $(c_src)           c_flags_$(srcdir)_$($(subst .,_,$(subst /,_,name))) := $($(subst .,_,$(subst /,_,name)))       $($(subst .,_,$(subst /,_,name))) :=     done     ----[ end of problem site ]----       save_c_src += $(c_src:%=$(srcdir)/%)     save_cpp_src += $(cpp_src:%=$(srcdir)/%)      c_src := $(save_c_src)     cpp_src := $(save_cpp_src) 

ilya

assuming you're using gnu make, can use:

$(foreach name,$(subst .,_,$(subst /,_,$(c_src))),$(eval $(name)_opt := $($(name)))) 

which believe want.